Under the two points mentioned above , we designed a 16 bits dsp core - md16 在以上兩點(diǎn)的前提下,我們?cè)O(shè)計(jì)了md16的核。
This dsp core is realized in a 0 . 35um cmos technology and can work at above 80mhz 最后實(shí)現(xiàn)在o 35微米cmos標(biāo)準(zhǔn)單元庫(kù)支持下,工作頻率可以達(dá)到80mhz以上。
As a result , current day ' s design teams using dsp cores are forced to spend a large amount of time in handwriting of machine code ( usually assembly code ) 所以,當(dāng)前很多設(shè)計(jì)人員就花了大量的精力和時(shí)間在寫匯編代碼上。
Next tms320c6000 dsp chip is introduced and some methods used to optimizing g . 729 according to the architecture of the dsp core is recommended 接著介紹了tms320c6000器件以及根據(jù)其特點(diǎn)對(duì)itu - t提供的源代碼進(jìn)行優(yōu)化的一些方法。
In order to inprove the performance of md16 , one method is transforming the architecture to the multi issue architecture . so a vliw dsp core is set up 為了進(jìn)一步提高md16的性能,一個(gè)可行的方式就是把單發(fā)射處理器結(jié)構(gòu)轉(zhuǎn)向多發(fā)射處理器結(jié)構(gòu)。